Analog AI chips increase speech recognition energy efficiency by 14 times

Scientists at IBM Research Labs in the United States report an artificial intelligence (AI) analog chip that is 14 times more energy efficient than traditional digital computer chips. This chip is more efficient than general-purpose processors in speech recognition, and this technology may break the bottleneck encountered in current AI development due to the demand for computing power performance and efficiency. The study was recently published in Nature.

With the rise of AI technology, so does the demand for energy and resources. In the field of speech recognition, software upgrades have greatly improved the accuracy of automatic transcription, but due to the increasing number of operations moving between memory and processor, the hardware cannot keep up with the millions of parameters required to train and run these models.

One solution proposed by the researchers is to use “in-memory computing” (CiM, or analog AI) chips. Analog AI systems prevent inefficiencies by performing operations directly within its own memory, while digital processors require additional time and energy to move data between memory and processor. Analog AI chips are expected to greatly improve the energy efficiency of AI computing; But practical demonstration of this has been lacking.

Stefano Ambrogio of IBM Research Labs and colleagues developed a 14-nanometer analog chip containing 35 million phase-varying memory cells in 34 modules. The research team tested the efficiency of the chip in terms of language processing capabilities with two speech recognition software, a small network and a large network, and compared it with industry standards in natural language processing tasks. The performance and accuracy of small networks are comparable to current digital technologies. For larger models, the chip can achieve 12.4 trillion operations per second and system performance is estimated to be up to 14 times that of traditional general-purpose processors.

The study validates the performance and efficiency of analog AI technology in both small and large models, supporting its potential as a commercially viable alternative to digital systems. (Source: Feng Weiwei, China Science News)

A 300mm wafer used to simulate AI chips. Image courtesy of Ryan Lavine

14nm analog AI chip on the inspection board. Image courtesy of Ryan Lavine

The researcher holds a 14-nanometer analog AI chip. Image courtesy of Ryan Lavine

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